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NetZIP: Algorithm/Hardware Co-design of In-network Lossless Compression for Distributed Large Model TrainingJinghan HuangHyungyo Kimet al.2025MICRO 2025
Simulating the Training and Inference of Analog In-Memory Computing SystemsManuel Le Gallo2025SISPAD 2025
Update Disturbance-Resilient Analog ReRAM Crossbar Arrays for In-Memory Deep Learning AcceleratorsWooseok ChoiTommaso Stecconiet al.2025Advanced Science
The NorthPole Validator: A Cycle-Accurate Simulator for HW/SW Codesign of a Prescheduled Neural Inference AcceleratorAlexander AndreopoulosMichael Deboleet al.2025HPEC 2025
SSD controller architecture for similarity search in Vector DBsRoman PletkaJovan Blanusaet al.2025FMS 2025
Deep learning software stacks for analogue in-memory computing-based acceleratorsCorey Liam LammieHadjer Benmezianeet al.2025Nat. Rev. Electr. Eng.
Architecture and Design Approaches towards Large-scale AI Hardware AccelerationAshish Ranjan2025DAC 2025
Innovative BEOL Oxide-Based Devices as Key Enablers for High-Performing Heterogeneous SystemsValeria BragagliaWooseok Choiet al.2025DRC 2025
Routing Congestion Mitigation Techniques Targeting Dense DesignsAlex SuessLakshmi Reddyet al.2025DAC 2025