Conference paper
Impact of back bias on ultra-thin body and BOX (UTBB) devices
Q. Liu, Frederic Monsieur, et al.
VLSI Technology 2011
In this paper, we report the results of extensive RTN trap analysis in high-k / metal-gate pFETs with respect to the response of >1400 traps to gate voltage, and discuss, for the first time, the impact of these results on understanding BTI stress and recovery effects. Our results suggest that the statistical variation in BTI effects in scaled devices may become very large because of the wide range of trap characteristics. © 2011 JSAP (Japan Society of Applied Physi.
Q. Liu, Frederic Monsieur, et al.
VLSI Technology 2011
Naoki Tega, Hiroshi Miki, et al.
IRPS 2011
Kangguo Cheng, A. Khakifirooz, et al.
VLSI Technology 2011
Jeffrey L. Burns
VLSI Technology 2011