High speed, lateral PIN photodiodes in silicon technologies
Jeremy D. Schaub, Steven J. Koester, et al.
SPIE IOPTO 2004
Dependence of CMOS performance on silicon crystal orientation of (100), (111), and (110) has been investigated with the equivalent gate dielectric thickness less than 3 nm. Hole mobility enhancement of ≥ 160% has been observed for both oxynitride and HfO2 gate dielectrics on (110) surfaces compared with (100). CMOS drive current is nearly symmetric on (110) orientation without any degradation of subthreshold slope. For HfO2 gate dielectrics, an approximately 68% enhancement of pMOSFET drive current has been demonstrated on (110) substrates at Lpoly = 0.12 μm, while current reduction in nMOS is around 26%.
Jeremy D. Schaub, Steven J. Koester, et al.
SPIE IOPTO 2004
Evgeni P. Gusev, Vijay Narayanan, et al.
IBM J. Res. Dev
Kuan-Neng Chen, Sang Hwui Lee, et al.
IEDM 2006
Qiqing Ouyang, Min Yang, et al.
VLSI Technology 2005