High performance transistors featured in an aggressively scaled 45nm bulk CMOS technologyZ. LuoN. Rovedoet al.2007VLSI Technology 2007
Uniaxial strain relaxation on ultra-thin strained-Si directly on insulator (SSDOI) substratesHaizhou YinZ. Renet al.2006ICSICT 2006
Patterning strategies for gate level tip-tip distance reduction in SRAM cell for 45nm and beyondHaoren ZhuangHelen Wanget al.2007ISTC 2007
Structure, design and process control for Cu bonded interconnects in 3D integrated circuitsKuan-Neng ChenSang Hwui Leeet al.2006IEDM 2006
Novel enhanced stressor with graded embedded SiGe source/drain for high performance CMOS devicesJ.-P. HanH. Utomoet al.2006IEDM 2006
Integration of local stress techniques with strained-Si directly on insulator (SSDOI) substratesHaizhou YinZ. Renet al.2006VLSI Technology 2006
Poly-Si/AlN/HfSiO stack for ideal threshold voltage and mobility in sub-100 nm MOSFETsK.-L. LeeM.M. Franket al.2006VLSI Technology 2006
Lower resistance scaled metal contacts to silicide for advanced CMOSA. TopolC. Sherawet al.2006VLSI Technology 2006
Investigation of FinFET devices for 32nm technologies and beyondH. ShangL. Changet al.2006VLSI Technology 2006
Critical aspects of layer transfer and alignment tolerances for 3D integration processesD.C. La TulipeL.T. Shiet al.2006GBC 2006