Publications

61 results for Peter Buchmann

A small-area voltage regulator with high-bandwidth supply-rejection using a regulated replica in 45nm CMOS SOI
- - Thomas Toifl
  - Christian Menolfi
  - et al.
- 2008
- A-SSCC 2008
A T-coil-enhanced 8.5Gb/s high-swing source-series-terminated transmitter in 65nm bulk CMOS
- - Marcel Kossel
  - Christian Menolfi
  - et al.
- 2008
- ISSCC 2008
A low-power 40 Gbit/s receiver circuit based on full-swing CMOS-style clocking
- - Thomas Toifl
  - Christian Menolfi
  - et al.
- 2007
- CSICS 2007
Wide tuning range LC-oscillator in 65nm SOI CMOS, based on switchable secondary inductor
- - T. Morf
  - M. Kossel
  - et al.
- 2007
- Electronics Letters
A 22-Gb/s PAM-4 receiver in 90-nm CMOS SOI technology
- - Thomas Toifl
  - Christian Menolfi
  - et al.
- 2006
- IEEE Journal of Solid-State Circuits
A 0.94-ps-RMS-Jitter 0.016-mm ² 2.5-GHz Multiphase Generator PLL with 360° Digitally Programmable Phase Shift for 10-Gb/s Serial Links
- - Thomas Toifl
  - Christian Menolfi
  - et al.
- 2005
- IEEE Journal of Solid-State Circuits
A 22 Gbit/s PAM-4 receiver in 90nm CMOS-SOI technology
- - Thomas Toifl
  - Christian Menolfi
  - et al.
- 2005
- VLSI Circuits 2005
Electrical and optical transceivers for short-range data communication, fabricated in VLSI 90-nm bulk and SOI CMOS technology
- - Thomas Morf
  - Christian Menolfi
  - et al.
- 2005
- CSICS 2005
Low-jitter 10 GHz multiphase PLL in 90 nm CMOS
- - M. Kossel
  - P. Buchmann
  - et al.
- 2005
- Electronics Letters
Single-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution
- - Peter H. Baechtold
  - Michael P. Beakes
  - et al.
- 2001
- IEEE Journal of Solid-State Circuits