A 28.05Gb/s transceiver using quarter-rate triple-speculation hybrid-DFE receiver with calibrated sampling phases in 32nm CMOS
- Gautam Gangasani
- John F. Bulzacchelli
- et al.
- 2017
- VLSI Circuits 2017
Conference paper
Publications
16 results for John Ewen
A 32 Gb/s backplane transceiver with on-chip AC-coupling and low latency CDR in 32 nm SOI CMOS technology
- Gautam R. Gangasani
- Chun-Ming Hsu
- et al.
- 2014
- IEEE JSSC
PaperDMD measurements and equalization simulations for 62.5- and 50-μm legacy multimode fibers at 1300 nm
- Aleksandar Risteski
- Eric Borisch
- et al.
- 2004
- IEEE Photonics Technology Letters
PaperSingle-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution
- Peter H. Baechtold
- Michael P. Beakes
- et al.
- 2001
- IEEE Journal of Solid-State Circuits
PaperSingle-chip 4 × 500-MBd CMOS transceiver
- Albert X. Widmer
- Kevin Wrenner
- et al.
- 1996
- IEEE Journal of Solid-State Circuits
PaperA 2.4-GHz silicon bipolar oscillator with integrated resonator
- Mehmet Soyuer
- Keith A. Jenkins
- et al.
- 1996
- IEEE Journal of Solid-State Circuits
PaperSingle-chip 4×500Mbaud CMOS transceiver
- A.X. Widmer
- K. Wrenner
- et al.
- 1996
- ISSCC 1996
Conference paperOpportunities for standard silicon technology in RFMicrowave applications
- J.N. Burghartz
- M. Soyuer
- et al.
- 1995
- ESSDERC 1995
Conference paper1.6Gb/s CMOS phase-frequency locked loop for timing recovery
- M. Soyuer
- H. Ainspan
- et al.
- 1995
- ISCAS 1995
Conference paperMultilevel monolithic inductors in silicon technology
- M. Soyuer
- J.N. Burghartz
- et al.
- 1995
- Electronics Letters
Paper