Co-Packaged Optics (CPO) Technology Full Module Test Vehicle Demonstrations

The co-packaged optics (CPO) technology demonstrations included full module hardware design, modeling, build, assembly and characterization. This research team drove collaboration from design, modeling and simulation though component design, build or procurement, component / hardware characterization followed by development and demonstrations of full module build, assembly and characterization.

Full module build with photonic integrated circuit (PIC) to polymer optical waveguides (POW) first and PIC to POW last assemblies were successfully built and characterized with data showing flip chip & BGA reflow compatibility (see Figure 1). Full module build also included JEDEC stress testing for deep thermal cycling, low temperature storage, high temperature storage and temperature and humidity test and characterization.

These optical link and simulation models have been evaluated with PIC to POW to Ferrule assemblies using twelve waveguides per POW with 50 um pitch PIC to POW compared to standard SMF attach at 250 um pitch. Modeling and hardware demonstrations have also shown optical waveguide pitch reduction from standard SMF V-groove packaging at 250 um toward either demonstrated chip pitch at 50 um. Data and results are reported on the test vehicle demonstrations and early learning on higher density PIC attach at pitch at < 25 um pitch ( a > 10x density increase compared to standard single mode fiber chip attach of 250 um pitch.

Figure 1 shows full modules view of top of test vehicle demonstration hardware with lid (top) and bottom of integrated full module hardware build (bottom) showing micro-BGA on laminate substrate with polymer optical waveguide and pluggable ferrule. Left view of sample was built with optical waveguide and photonics integrated chips (PIC) assembled first and right view shows sample built with optical waveguide assembled to photonic integrated circuit (PIC) last assembly process flow.