An 18-mW 2.5-GHz/900-MHz BiCMOS dual frequency synthesizer with < 10-Hz RF carrier resolution
- Woogeun Rhee
- Biagio Bisanti
- et al.
- 2002
- IEEE Journal of Solid-State Circuits
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224 results at IEEE Journal of Solid-State Circuits
A clock distribution network for microprocessors
- Phillip J. Restle
- Timothy G. McNamara
- et al.
- 2001
- IEEE Journal of Solid-State Circuits
Dynamic body charge modulation for sense amplifiers in partially depleted SOI technology
- Jente B. Kuang
- David H. Allen
- et al.
- 2001
- IEEE Journal of Solid-State Circuits
On the temperature dependence of hysteresis effect in floating-body partially depleted SOI CMOS circuits
- R. Puri
- C.T. Chuang
- et al.
- 2001
- IEEE Journal of Solid-State Circuits
Single-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution
- Peter H. Baechtold
- Michael P. Beakes
- et al.
- 2001
- IEEE Journal of Solid-State Circuits
SiGe BiCMOS 3.3-V clock and data recovery circuits for 10-Gb/s serial transmission systems
- Mounir Meghelli
- Ben Parker
- et al.
- 2000
- IEEE Journal of Solid-State Circuits
1-GHz fully pipelined 3.7-ns address access time 8 k × 1024 embedded synchronous DRAM macro
- Osamu Takahashi
- Sang H. Dhong
- et al.
- 2000
- IEEE Journal of Solid-State Circuits
Hysteresis Effect in Pass-Transistor-Based, Partially Depleted SOI CMOS Circuits
- Ruchir Puri
- Ching-Te Chuang
- 2000
- IEEE Journal of Solid-State Circuits
2-GHz clocked AlGaAs/GaAs HBT byte-slice datapath chip
- Steven R. Carlough
- Robert A. Philhower
- et al.
- 2000
- IEEE Journal of Solid-State Circuits
A 7F2 cell and bitline architecture featuring tilted array devices and penalty-free vertical BL twists for 4-Gb DRAM's
- Heinz Hoenigschmid
- Alexander Frey
- et al.
- 2000
- IEEE Journal of Solid-State Circuits