Effective schottky barrier lowering for contact resistivity reduction using silicides as diffusion sources
- Zhen Zhang
- F. Pagette
- et al.
- 2010
- VLSI-TSA 2010
Publications
36 results for Q. Ouyang
FDSOI CMOS with dielectrically-isolated back gates and 30nm LG high-κ/metal gate
- Marwan Khater
- J. Cai
- et al.
- 2010
- VLSI Technology 2010
Sharp reduction of contact resistivities by effective schottky barrier lowering with silicides as diffusion sources
- Zhen Zhang
- F. Pagette
- et al.
- 2010
- IEEE Electron Device Letters
High-κ/metal-gate fully depleted SOI CMOS with single-silicide schottky source/drain with sub-30-nm gate length
- Marwan H. Khater
- Zhen Zhang
- et al.
- 2010
- IEEE Electron Device Letters
FDSOI CMOS with dual backgate control for performance and power modulation
- Jeng-Bang Yau
- Jin Cai
- et al.
- 2009
- VLSI-TSA 2009
Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond
- H. Kawasaki
- V.S. Basker
- et al.
- 2009
- IEDM 2009
Demonstration of highly scaled FinFET SRAM cells with high-Κ/metal gate and investigation of characteristic variability for the 32 nm node and beyond
- H. Kawasaki
- M. Khater
- et al.
- 2008
- IEDM 2008
Systematic characterization of pseudomorphic (110) intrinsic SiGe epitaxial films for hybrid orientation technology with embedded SiGe source/drain
- Qiqing Ouyang
- Anita Madan
- et al.
- 2006
- MRS Spring Meeting 2006
Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates
- Qiqing Ouyang
- Min Yang
- et al.
- 2005
- VLSI Technology 2005
Simulation study of reduced self-heating in novel thin-SOI vertical bipolar transistors
- Qiqing Ouyang
- Kai Xiu
- 2005
- SISPAD 2005