Bottom oxidation through STI (BOTS) - A novel approach to fabricate dielectric isolated FinFETs on bulk substrates
- K. Cheng
- S.-C. Seo
- et al.
- 2014
- VLSI Technology 2014
Conference paper
Publications
18 results for Ron Sampson
10nm FINFET technology for low power and high performance applications
- D. Guo
- H. Shang
- et al.
- 2014
- ICSICT 2014
Conference paperHigh performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond
- Q. Liu
- M. Vinet
- et al.
- 2013
- IEDM 2013
Conference paperHigh performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET
- K. Cheng
- A. Khakifirooz
- et al.
- 2012
- IEDM 2012
Conference paperCu CMP and its challenge for 20nm nodes and beyond
- John H. Zhang
- Wei-Tsu Tseng
- et al.
- 2012
- MRS Spring Meeting 2012
Conference paperHigh performance bulk planar 20nm CMOS technology for low power mobile applications
- Huiling Shang
- Sameer Jain
- et al.
- 2012
- VLSI Technology 2012
Conference paperCompetitive and cost effective copper/low-k interconnect (BEOL) for 28 nm CMOS technologies
- R. Augur
- C. Child
- et al.
- 2012
- Microelectronic Engineering
PaperEffect of thermal annealing on carbon in in-situ phosphorous-doped Si 1-xC x films
- Thomas Adam
- Nicolas Loubet
- et al.
- 2012
- Thin Solid Films
PaperNew layout dependency in high-k/metal gate MOSFETs
- M. Hamaguchi
- Deleep R. Nair
- et al.
- 2011
- IEDM 2011
Conference paperImpact of back bias on ultra-thin body and BOX (UTBB) devices
- Q. Liu
- Frederic Monsieur
- et al.
- 2011
- VLSI Technology 2011
Conference paper