Evaluation of High NA EUV for Subtractive Interconnect Patterning in Advanced Nodes
- Chris Penny
- Joe Lee
- et al.
- 2026
- SPIE Advanced Lithography + Patterning 2026
Publications
10 results for Joe Lee
Metal-Oxide Resist Develop Method Down-Select and Process Optimization
- Nicholas Latham
- Belle Antonovich
- et al.
- 2026
- SPIE Advanced Lithography + Patterning 2026
Exploring the Limits of Contact Hole Patterning with High NA EUV Lithography
- Dario Goldfarb
- Zheng Chen
- et al.
- 2026
- SPIE Advanced Lithography + Patterning 2026
Accelerating High NA EUV Lithography Insertion for Interconnect Scaling and Beyond: Performance, Cost, and Future Prospects
- Luciana Meli
- Indira Seshadri
- et al.
- 2025
- SPIE Advanced Lithography + Patterning 2025
High Volume Manufacturing Innovations for Metal-Oxide Resist Patterning
- Nicholas Latham
- Jennifer Church
- et al.
- 2025
- SPIE Advanced Lithography + Patterning 2025
Fully subtractive Ru Topvia interconnects with minimum 9 nm-space airgap for RC performance and reliability enhancement as post-Cu interconnects
- Koichi Motoyama
- Jaemyung Choi
- et al.
- 2024
- IEDM 2024
Backside power distribution for nanosheet technologies beyond 2nm
- Ruilong Xie
- Wonhyuk Hong
- et al.
- 2024
- VLSI Technology and Circuits 2024
Plasma Processing and the Semiconductor Supply Chain in an Era of Low GWP and/or PFAS-Free Gas Chemistries
- 2024
- CMC Conference 2024
EUV Double Patterning Solution for Subtractive Metal Patterning at 18nm Pitch
- Chris Penny
- Koichi Motoyama
- et al.
- 2024
- SPIE Advanced Lithography + Patterning 2024
Etch and Patterning Development for 2nm Node Nanosheet Devices
- Eric Miller
- Indira Seshadri
- et al.
- 2022
- SPIE Advanced Lithography 2022