Publications

23 results for Amir Nahir

Test Generation Methods for Utilization Improvement of Hardware-Accelerated Simulation Platforms
- - Wisam Kadry
  - Dimtry Krestyashyn
  - et al.
- 2017
- IEEE Design and Test
Comparative study of test generation methods for simulation accelerators
- - Wisam Kadry
  - Dimtry Krestyashyn
  - et al.
- 2015
- DATE 2015
Solutions to IBM POWER8 verification challenges
- - Klaus-Dieter Schubert
  - John M. Ludden
  - et al.
- 2015
- IBM J. Res. Dev
Debugging post-silicon fails in the IBM POWER8 bring-up lab
- - Manoj Dusanapudi
  - S. Fields
  - et al.
- 2015
- IBM J. Res. Dev
Dynamic selection of trace signals for post-silicon debug
- - Kanad Basu
  - Prabhat Mishra
  - et al.
- 2013
- MTV 2013
Verification of transactional memory in POWER8
- - Allon Adir
  - Dave Goodman
  - et al.
- 2014
- DAC 2014
Post-Silicon validation of the IBM Power8 processor
- - Amir Nahir
  - Manoj Dusanapudi
  - et al.
- 2014
- DAC 2014
Effective post-silicon failure localization using dynamic program slicing
- - Ophir Friedler
  - Wisam Kadry
  - et al.
- 2014
- DATE 2014
Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms
- - Debapriya Chatterjee
  - Biruk Mammo
  - et al.
- 2013
- ICCAD 2013
Emulation in post-silicon validation: It's not just for functionality anymore
- - Kyle Balston
  - Alan J. Hu
  - et al.
- 2012
- HLDVT 2012