Publications

21 results for Hazar Yueksel

Is there a trade-off between fairness and accuracy? A perspective using mismatched hypothesis testing
- - Sanghamitra Dutta
  - Dennis Wei
  - et al.
- 2020
- ICML 2020
A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET
- - Gain Kim
  - Marcel Kossel
  - et al.
- 2020
- IEEE JSSC
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET
- - Gain Kim
  - Lukas Kull
  - et al.
- 2019
- A-SSCC 2019
30.2 A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET
- - Gain Kim
  - Lukas Kull
  - et al.
- 2019
- ISSCC 2019
A 12-bit 300-MS/s SAR ADC with inverter-based preamplifier and common-mode-regulation DAC in 14-nm CMOS FinFET
- - Danny Luu
  - Lukas Kull
  - et al.
- 2018
- IEEE JSSC
Design Techniques for High-Speed Multi-Level Viterbi Detectors and Trellis-Coded-Modulation Decoders
- - Hazar Yueksel
  - Matthias Braendli
  - et al.
- 2018
- IEEE TCAS-I
Background calibration using noisy reference ADC for a 12b 600MS/s 2×TI SAR ADC in 14nm CMOS FinFET
- - Danny Luu
  - Lukas Kull
  - et al.
- 2017
- ESSCIRC 2017
DDR4 transmitter with ac-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS Technology
- - Marcel Kossel
  - Christian Menolfi
  - et al.
- 2017
- ESSCIRC 2017
A 12b 61dB SNDR 300MS/s SAR ADC with inverter-based preamplifier and common-mode-regulation DAC in 14nm CMOS FinFET
- - Danny Luu
  - Lukas Kull
  - et al.
- 2017
- VLSI Circuits 2017
A 5Gb/s 7.1fJ/b/mm 8× multi-drop on-chip 10mm data link in 14nm FinFET CMOS SOI at 0.5V
- - Elisa Sacco
  - Pier Andrea Francese
  - et al.
- 2017
- VLSI Circuits 2017