SOI for a 1-Volt CMOS Technology and Application to a 512kb SRAM with 3.5 ns Access Time
- G. Shahidi
- T.H. Ning
- et al.
- 1993
- IEDM 1993
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26 results for C.J. Anderson
A Josephson Technology System Level Experiment
- M.B. Ketchen
- B.J. van der Hoeven
- et al.
- 1981
- IEEE Electron Device Letters
Dual-mode parasitic bipolar effect in dynamic CVSL XOR circuit with floating-body partially-depleted SOI devices
- C.T. Chuang
- P.F. Lu
- et al.
- 1997
- VLSI-TSA 1997
Floating body effects in partially-depleted SOI CMOS circuits
- P.F. Lu
- J. Ji
- et al.
- 1996
- LPED 1996
Floating body effects in partially-depleted SOI CMOS circuits
- P.F. Lu
- J. Ji
- et al.
- 1996
- LPED 1996
High-speed low-power cross-coupled active-pull-down ECL circuit
- C.T. Chuang
- B.S. Wu
- et al.
- 1993
- BCTM 1993
GaAs MESFET 16 × 16 crosspoint switch at 1700 Mbits/sec
- C.J. Anderson
- J.H. Magerlein
- et al.
- 1987
- GaAs IC 1987
GaAs 16×16 MESFET crosspoint switch at 1700 Mbits/sec
- G.J. Scott
- C.J. Anderson
- 1988
- ECOC 1988
GaAs MESFET 4 multiplied by 4 CROSSPOINT SWITCH.
- C.J. Anderson
- 1985
- GaAs IC 1985
Circuit and technique for characterizing switching delay history effects in silicon-on-insulator logic gates
- Mark B. Ketchen
- Manjul Bhushan
- et al.
- 2004
- Review of Scientific Instruments