Huiling Shang, Sameer Jain, et al.
VLSI Technology 2012
Strain effects from stress liners on silicon-on-insulator MOSFETs with high- k dielectric and metal gate (HKMG) are reported. By thoroughly evaluating their impact on drive current, mobility, and threshold voltage, the intrinsic performance gain of stress liners is quantified at the 32-nm node with mobility enhancement identified as the major source. It is also experimentally demonstrated that advantageous stress liners can reduce gate leakage currents for MOSFETs with HKMG. © 2006 IEEE.
Huiling Shang, Sameer Jain, et al.
VLSI Technology 2012
Sathya Raghavan, Ben Yang, et al.
ECTC 2025
Bin Yang, Ming Cai
Science China Information Sciences
Qianwen Chen, Michael Belyansky, et al.
ECTC 2023