Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
In this paper, we develop a multiplicative model to simulate the tungsten (W) film resistivity and gate resistance for replacement metal gate (RMG) with W electrode. Our multiplicative model predicts that TiN fill offers the lower gate resistance than TiN/W fill for highly scaled gate lengths. By absorbing the results from our model into the real RMG FinFET devices, we observe that TiN fill provides ∼6.4 % performance improvement compared to TiN/W fill. Meanwhile, the employment of gate conductance for gate stack film thickness monitoring is also described in our work.
Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
Barry P. Linder, A. Dasgupta, et al.
IRPS 2016
G. Tsutsui, C. Durfee, et al.
VLSI Technology 2018
Ruqiang Bao, Reinaldo A. Vega, et al.
IEDM 2019