M. Hargrove, S.W. Crowder, et al.
IEDM 1998
The reliability of a 0.35 μm p+ poly-gate p-MOSFET CMOS technology under conductive channel hot carrier conditions is investigated. At any bias and temperature condition applied, the degradation of sufficiently short channel length (Leff≈0.14 μm) devices results in a reduction in drive current due to the impact of donor type interface trap generation and positive charge formation during the stress. The role of the two mechanisms, Negative Bias Temperature Instability (NBTI) and Channel Hot Carrier (CHC), in determining the shift of typical device parameters is shown.
M. Hargrove, S.W. Crowder, et al.
IEDM 1998
M.W. Ruprecht, G. La Rosa, et al.
IRPS 2001
L. Su, S. Subbanna, et al.
VLSI Technology 1996
L.K. Han, S.W. Crowder, et al.
IEDM 1997