Layout dependence of gate dielectric TDDB in HKMG FinFET technology
- Wen Liu
- Ernest Y. Wu
- et al.
- 2016
- IRPS 2016
Publications
19 results for Fernando Guarin
Experimental and Simulation Results of Magnetic Modulation of Gate Oxide Tunneling Current in Nanoscaled MOS Transistors
- Gabriela A. Rodríguez-Ruiz
- Edmundo A. Gutiérrez-Domínguez
- et al.
- 2015
- IEEE Electron Device Letters
Thermo-magnetic effects in nano-scaled MOSFET: An experimental, modeling, and simulation approach
- Gabriela A. Rodríguez-Ruiz
- Edmundo A. Gutiérrez-Domínguez
- et al.
- 2015
- IEEE J-EDS
High performance 14nm SOI FinFET CMOS technology with 0.0174μm2 embedded DRAM and 15 levels of Cu metallization
- C.-H.C-H. Lin
- Brian Greene
- et al.
- 2014
- IEDM 2014
Non-homogeneous space mechanical strain induces asymmetrical magneto-tunneling conductance in MOSFETs
- A. Erika Póndigo De Los
- Edmundo A. Gutierrez-D
- et al.
- 2014
- ESSDERC 2014
Process dependence of AC/DC PBTI in HKMG n-MOSFETs
- Wen Liu
- Giuseppe La Rosa
- et al.
- 2014
- IRPS 2014
Observation of asymmetric magnetoconductance in strained 28-nm Si MOSFETs
- E.A. Gutiérrez-D.
- E. Póndigo-De Los A.
- et al.
- 2012
- IEEE Electron Device Letters
Experimental evidence of unconventional room-temperature Quantum Hall effect (RTQHE) in 65nm Si nMOSFETs at very low magnetic fields
- Edmundo A. Gutierrez-D
- Fernando Guarin
- 2010
- ESSDERC 2010
High-K gate stack breakdown statistics modeled by correlated interfacial layer and high-k breakdown path
- G. Ribes
- P. Mora
- et al.
- 2010
- IRPS 2010
32nm general purpose bulk CMOS technology for high performance applications at low voltage
- F. Arnaud
- J. Liu
- et al.
- 2008
- IEDM 2008