Multi-line crosstalk and common-mode noise analysis

Crosstalk and common mode noise evaluation was performed using a multi-line synthesis approach. A restricted topology and frequency range lumped-element network with dependent voltage sources provided an efficient technique for modeling multi-line crosstalk and common-mode noise. Effects such as vertical-coupling and common-mode noise were shown to push the total on-chip noise over the available budget and could become significant contributors to logic failure as wider and faster data buses are used in the future. The modeling approach was validated through measurements on representative test vehicles.