Measuring Jitter and Phase Error in Microprocessor Phase-Locked Loops

Keith A. Jenkins; James P. Eckhardt

doi:10.1109/54.844337

IEEE Design and Test of Computers

Paper

01 Apr 2000

Measuring Jitter and Phase Error in Microprocessor Phase-Locked Loops

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Abstract

Excessive "jitter," caused primarily by power supply noise, can detract from the advantages of phase-locked loops. Moreover, in a multichip system, the accumulated phase error must be measured - not just the jitter.

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On-chip circuit to monitor long-term NBTI and PBTI degradation

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An on-chip test structure and digital measurement method for statistical characterization of local random variability in a process

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High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes

Shu Jen Han, Jianshi Tang, et al.

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Internal Node Probing of a DRAM with a Low-Temperature e-Beam Tester

Keith A. Jenkins, Walter H. Henkels

IEEE Journal of Solid-State Circuits

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Abstract

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