Data retention in SOI-DRAM with trench capacitor cell
Hussein I. Hanafi, Thomas Kanarsky, et al.
ESSDERC 1998
A threshold-shifting, single transistor memory structure with fast read and write times and long retention time is described. The structure consists of a silicon field-effect transistor with nano-crystals of germanium or silicon placed in the gate oxide in close proximity of the inversion surface. Electron charge is stored in these isolated 2-5 nm size nano-crystals which are separated from each other by greater than 5 nm of SiO2 and from the inversion layer of the substrate surface by less than 5 nm of SiU2. Direct tunneling of charge from the inversion layer and its storage in the nano-crystal causes a shift in the threshold voltage which is detected via current sensing. The nano-crystals are formed using implantation and annealing or using direct deposition of the distributed floating gate region. Threshold shift of 0.3 V is obtained in Ge-implanted devices with 2 nm of SiO2 injection layer by a 4 V write pulse of 300 ns duration. The nanocrystal memories achieve improved programming characteristics as a nonvolatile memory as well as simplicity of the single pol v-Sigate process. The VT window is scarcely degraded after greater than 109 write/erase cycles or greater than 105 s retention time. Nano-crystal memories are promising for nonvolatile memory applications. © 1996 IEEE.
Hussein I. Hanafi, Thomas Kanarsky, et al.
ESSDERC 1998
Sandip Tiwari, David J. Frank
Applied Physics Letters
Hussein I. Hanafi, Robert H. Dennard, et al.
IEEE Journal of Solid-State Circuits
Sandip Tiwari, David J. Frank, et al.
IEEE T-ED