CLEAR: Crosslayer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor coresEric ChengShahrzad Mirkhaniet al.2016DAC 2016
Probabilistic bug-masking analysis for post-silicon tests in microprocessor verificationDoowon LeeyTom Kolanet al.2016DAC 2016
Practical statistical static timing analysis with current source modelsDebjit SinhaVladimir Zolotovet al.2016DAC 2016
A high-resolution side-channel attack on last-level cacheMehmet KayaalpNael Abu-Ghazalehet al.2016DAC 2016