Super-halo asymmetric vertical pass transistor design for ultra-dense DRAM technologiesD. ChidambarraoK. McStayet al.2003VLSI-TSA 2003
Competitive advantage of SOI from dynamic threshold shifts and reduced capacitanceMark B. Ketchen2003VLSI-TSA 2003
Novel techniques for scaling deep trench DRAM capacitor technology to 0.11 μm and beyondP.S. ParkinsonK. Settlemyeret al.2003VLSI-TSA 2003
Recent progress in devices and materials for CMOS technologyH.-S. Philip WongB. Doriset al.2003VLSI-TSA 2003
Structural demonstration of cost effective Isolation Trench fill for sub-110nm vertical trench DRAM and SOC applicationsS.-W. YangW.-S. Liaoet al.2003VLSI-TSA 2003
Analysis and modeling methodology of strained-Si channel-on-insulator (SSOI) MOSFETsKeunwoo KimChing-Te Chuanget al.2003VLSI-TSA 2003
On the retention time distribution of dual-channel vertical DRAM technologiesJ. BeintnerY. Liet al.2003VLSI-TSA 2003