A Two-Stage Weighted Capacitor Network for D/A-A/D Conversion
- L.G. Heller
- L.M. Terman
- 1979
- IEEE JSSC
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120 results at IEEE JSSC
Loop Decoder for Josephson Memory Arrays
- Sadeg M. Faris
- 1979
- IEEE JSSC
1 µm MOSFET VLSI Technology: Part VIII-Radiation Effects
- John M. Aitken
- 1979
- IEEE JSSC
Sub-100 ps Experimental Josephson Interferometer Logic Gates
- Melvin Klein
- Dennis J. Herrell
- 1978
- IEEE JSSC
An Experimental 64-Bit Decoded Josephson NDRO Random Access Memory
- Walter H. Henkels
- Hans H. Zappe
- 1978
- IEEE JSSC
Multiple Word/Bit Line Redundancy for Semiconductor Memories
- Stanley E. Schuster
- 1978
- IEEE JSSC
A Josephson Latch
- Arthur Davidson
- 1978
- IEEE JSSC
A 1 mV MOS Comparator
- Yen S. Yee
- Lewis M. Terman
- et al.
- 1978
- IEEE JSSC
A Figure of Merit for IC Packaging
- Robert W. Keyes
- 1978
- IEEE JSSC
A Multiple-Gate CCD-Photodiode Sensor Element for Imaging Arrays
- James M. White
- Savvas G. Chamberlain
- 1978
- IEEE JSSC