Lewis M. Terman, Lawrence G. Heller
IEEE JSSC
An MOS comparator circuit capable of detecting difference signals as low as 1 mV in 3 µs has been designed, built, and tested. The circuit does not require high accuracy components or tight control of device parameter tolerances. © 1978, IEEE. All rights reserved.
Lewis M. Terman, Lawrence G. Heller
IEEE JSSC
George Cheroff, Dale L. Critchlow, et al.
IEEE JSSC
Lewis M. Terman, Yen S. Yee, et al.
ISSCC 1981
Toshiaki Kirihata, Sang H. Dhong, et al.
IEEE Journal of Solid-State Circuits