Statistical interconnect metrics for physical-design optimization
- Kanak Agarwal
- Mridul Agarwal
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Impact of stress-induced backflow on full-chip electromigration risk assessment
- Haldun Haznedar
- Martin Gall
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power grid analysis using random walks
- Haifeng Qian
- Sani R. Nassif
- et al.
- 2005
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Crosstalk- and performance-driven multilevel full-chip routing
- Tsung-Yi Ho
- Yao-Wen Chang
- et al.
- 2005
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Sensitivity guided net weighting for placement-driven synthesis
- Haoxing Ren
- David Z. Pan
- et al.
- 2005
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Mixed block placement via fractional cut recursive bisection
- Ameya Ramesh Agnihotri
- Satoshi Ono
- et al.
- 2005
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Early-stage power grid analysis for uncertain working modes
- Haifeng Qian
- Sani R. Nassif
- et al.
- 2005
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Postroute gate sizing for crosstalk noise reduction
- Murat R. Becer
- David Blaauw
- et al.
- 2004
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Bus-driven floorplanning
- Hua Xiang
- Xiaoping Tang
- et al.
- 2004
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The Effects of Unsymmetric Matrix Permutations and Scalings in Semiconductor Device and Circuit Simulation
- Olaf Schenk
- Stefan Röllin
- et al.
- 2004
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems