A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference
- Jinwook Oh
- Sae Kyu Lee
- et al.
- 2020
- VLSI Circuits 2020
Conference paper
Publications
295 results for AI Hardware
Analog resistive crossbar arrays for neural network acceleration
- 2020
- DATE 2020
Invited talkSkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems
- Xiaofan Zhang
- Haoming Lu
- et al.
- 2020
- MLSys 2020
Conference paperWeight Programming in DNN Analog Hardware Accelerators in the Presence of NVM Variability
- Charles Mackin
- Sidney Tsai
- et al.
- 2019
- Advanced Electronic Materials
PaperTrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
- Filipp Akopyan
- Jun Sawada
- et al.
- 2015
- IEEE TCADIS
Paper