Publications

12 results for A. Vayshenker

Impact of charge trapping on the voltage acceleration of TDDB in metal gate/high-k n-channel MOSFETs
- - A. Kerber
  - A. Vayshenker
  - et al.
- 2010
- IRPS 2010
High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
- - M. Chudzik
  - B. Doris
  - et al.
- 2007
- VLSI Technology 2007
High performance transistors featured in an aggressively scaled 45nm bulk CMOS technology
- - Z. Luo
  - N. Rovedo
  - et al.
- 2007
- VLSI Technology 2007
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- - S. Narasimha
  - K. Onishi
  - et al.
- 2006
- IEDM 2006
65nm CMOS technology for low power applications
- - A. Steegen
  - R. Mo
  - et al.
- 2005
- IEDM 2005
High performance and low power transistors integrated in 65nm bulk CMOS technology
- - Z. Luo
  - A. Steegen
  - et al.
- 2004
- IEDM 2004
Growth and scaling of oxide conduction after breakdown
- - Barry P. Linder
  - James H. Stathis
  - et al.
- 2003
- IRPS 2003
A high performance 90 nm SOI technology with 0.992 μm² 6T-SRAM cell
- - Mukesh Khare
  - S. Ku
  - et al.
- 2002
- IEDM 2002
Voltage dependence of hard breakdown growth and the reliability implication in thin dielectrics
- - Barry P. Linder
  - Salvatore Lombardo
  - et al.
- 2002
- IEEE Electron Device Letters
The effect of change of voltage acceleration on temperature activation of oxide breakdown for ultrathin oxides
- - E. Wu
  - J.M. McKenna
  - et al.
- 2001
- IEEE Electron Device Letters