Publications

18 results for R. Mann

High performance bulk planar 20nm CMOS technology for low power mobile applications
- - Huiling Shang
  - Sameer Jain
  - et al.
- 2012
- VLSI Technology 2012
Optimization of DUV lithography for high-energy well implantation
- - Ryan Deschner
  - Seong-Dong Kim
  - et al.
- 2007
- SPIE Advanced Lithography 2007
65nm CMOS technology for low power applications
- - A. Steegen
  - R. Mo
  - et al.
- 2005
- IEDM 2005
Fluctuation limits & scaling opportunities for CMOS SRAM cells
- - Azeez Bhavnagarwala
  - Stephen Kosonocky
  - et al.
- 2005
- IEDM 2005
SRAM Cell Design for Stability Methodology
- - Clement Wann
  - Robert Wong
  - et al.
- 2005
- VLSI Technology 2005
High performance and low power transistors integrated in 65nm bulk CMOS technology
- - Z. Luo
  - A. Steegen
  - et al.
- 2004
- IEDM 2004
Trimming of hard-masks by gaseous chemical oxide removal (COR) for sub-10nm gates/fins, for gate length control and for embedded logic
- - Wesley C. Natzle
  - David Horak
  - et al.
- 2004
- ASMC 2004
Enhanced multi-threshold (MTCMOS) circuits using variable well bias
- - S.V. Kosonocky
  - M.J. Immediato
  - et al.
- 2001
- ISLPED 2001
Low temperature formation of C54-TiSi₂ using titanium alloys
- - C. Cabral Jr.
  - L. Clevenger
  - et al.
- 1997
- Applied Physics Letters
Lowering the formation temperature of the C54-TiSi₂ phase using a metallic interfacial layer
- - C. Cabral Jr.
  - L. Clevenger
  - et al.
- 1997
- Journal of Materials Research