Power management of multi-core chips: Challenges and pitfalls
- Pradip Bose
- Alper Buyuktosunoglu
- et al.
- 2012
- DATE 2012
Conference paper
Publications
16 results for Indira Nair
Power-efficient, reliable microprocessor architectures: Modeling and design methods
- Pradip Bose
- Alper Buyuktosunoglu
- et al.
- 2010
- GLSVLSI 2010
Conference paperThe effect of dynamic power management on mid-frequency and low-frequency power supply noise
- Howard Chen
- Indira Nair
- et al.
- 2010
- Journal of Low Power Electronics
PaperExploring power management in multi-core systems
- Reinaldo Bergamaschi
- Guoling Han
- et al.
- 2008
- ASP-DAC 2008
Conference paperPerformance modeling for early analysis of multi-core systems
- Reinaldo Bergamaschi
- Indira Nair
- et al.
- 2007
- CODES+ISSS 2007
Conference paperTransaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems
- Nagu Dhanwada
- Reinaldo A. Bergamaschi
- et al.
- 2006
- Des Autom Embedded Syst
PaperAn efficient system-on-a-chip design methodology for networking applications
- Valentins Salapura
- Christos J. Georgiou
- et al.
- 2004
- CASES 2004
Conference paperSEAS: A System for Early Analysis of SoCs
- Reinaldo A. Bergamaschi
- Youngsoo Shin
- et al.
- 2003
- CODES+ISSS 2003
Conference paperEarly analysis tools for system-on-a-chip design
- J.A. Darringer
- Reinaldo A. Bergamaschi
- et al.
- 2002
- IBM J. Res. Dev
PaperControl-flow versus data-flow-based scheduling: Combining both approaches in an adaptive scheduling system
- Reinaldo A. Bergamaschi
- Salil Raje
- et al.
- 1997
- IEEE Transactions on VLSI Systems
Review