Optimal design of nanoscale triple-gate devices
- Meng-Hsueh Chiang
- Tze-Neng Lin
- et al.
- 2006
- IEEE SOI 2006
Publications
16 results for Meng-Hsueh Chiang
High-density reduced-stack logic circuit techniques using independent-gate controlled double-gate devices
- Meng-Hsueh Chiang
- Keunwoo Kim
- et al.
- 2006
- IEEE Transactions on Electron Devices
High-density logic techniques with reduced-stack double-gate MOSFETs
- Meng-Hsueh Chiang
- Keunwoo Kim
- et al.
- 2005
- IEEE International SOI Conference 2005
Single polysilicon gate high-density logic using independently-controlled double-gate devices
- Meng-Hsueh Chiang
- Keunwoo Kim
- et al.
- 2005
- A-SSCC 2005
Novel high-density low-power logic circuit techniques using DG devices
- Meng-Hsueh Chiang
- Keunwoo Kim
- et al.
- 2005
- IEEE Transactions on Electron Devices
Novel high-density low-power high-performance double-gate logic techniques
- Meng-Hsueh Chiang
- Keunwoo Kim
- et al.
- 2004
- IEEE International SOI Conference 2004