CMOS scaling into the 21st century: 0.1 μm and beyond
- Y. Taur
- Y. Mii
- et al.
- 1995
- IBM J. Res. Dev
Publications
83 results for Yuan Taur
Defect generation in 3.5 nm silicon dioxide films
- D.A. Buchanan
- D.J. DiMaria
- et al.
- 1994
- Applied Physics Letters
Ultra-low power 0.1 μm CMOS
- Y. Mii
- S.J. Wind
- et al.
- 1994
- VLSI Technology 1994
Design and performance considerations for sub-0.1 μm double-gate SOI MOSFETs
- H.-S. Wong
- D.J. Frank
- et al.
- 1994
- IEDM 1994
A Comprehensive Study of Hot-Carrier Instability in P- and N-Type Poly-SI Gated MOSFET’s
- Charles C.-H. Hsu
- Duen-Shun Wen
- et al.
- 1994
- IEEE Transactions on Electron Devices
Experimental High Performance Sub-0.1 μm Channel nMOSFET's
- Y. Mii
- S. Rishton
- et al.
- 1994
- IEEE Electron Device Letters
High Performance 0.1 μm CMOS Devices with 1.5 V Power Supply
- Y. Taur
- S.J. Wind
- et al.
- 1993
- IEDM 1993
Three-Dimensional “Atomistic” Simulation of Discrete Random Dopant Distribution Effects in Sub-0.1μm MOSFET's
- Hon-Sum Wong
- Yuan Taur
- 1993
- IEDM 1993
High performance 0.1μm nMOSFET's with 10 ps/stage delay (85 K) at 1.5 V power supply
- Y. Mii
- S. Rishton
- et al.
- 1993
- VLSI Technology 1993
0.1 μm CMOS and beyond
- Yuan Taur
- Yuh-Jier Mii
- 1993
- VLSI-TSA 1993