Maximizing ESD robustness of current-mode-logic (CML) driver with internal gate bias network
- You Li
- James Di Sarro
- et al.
- 2013
- EOS/ESD 2013
Publications
4 results for Ralph Halbach
Capacitance investigation of diodes and SCRs for ESD protection of high frequency circuits in sub-100nm bulk CMOS technologies
- Junjun Li
- Robert Gauthier
- et al.
- 2007
- EOS/ESD 2007
Analysis of failure mechanism on gate-silicided and gate-non-silicided, drain/source silicide-blocked ESD NMOSFETs in a 65nm bulk CMOS technology
- Junjun Li
- David Alvarez
- et al.
- 2006
- IPFA 2006
Design and characterization of a multi-rc-triggered MOSFET-based power clamp for on-chip ESD protection
- Junjun Li
- Robert Gauthier
- et al.
- 2006
- EOS/ESD 2006