Clocking strategies and scannable latches for low power applicationsV. ZyubanDavid Meltzer2001ISLPED 2001
Inherently lower-power high-performance superscalar architecturesVictor V. ZyubanPeter M. Kogge2001IEEE TC
Power-aware microarchitecture: Design and modeling challenges for next-generation microprocessorsDavid M. BrooksPradip Boseet al.2000IEEE Micro