Publications

18 results for Jun Sawada

A 5.3GHz 8T-SRAM with operation down to 0.41V in 65nm CMOS
- - Leland Chang
  - Yutaka Nakamura
  - et al.
- 2007
- VLSI Circuits 2007
Combining ACL2 and an automated verification tool to verify a multiplier
- - Erik Reeber
  - Jun Sawada
- 2006
- ACL2 2006
Design of shifting and permutation units using LSDL circuit family
- - Ramyanshu Datta
  - Robert Montoye
  - et al.
- 2006
- ACSSC 2006
ACL2SIX: A hint used to integrate a theorem prover and an automated verification tool
- - Jun Sawada
  - Erik Reeber
- 2006
- FMCAD 2006
Limited switch dynamic logic circuits for high-speed low-power circuit design
- - Wendy Belluomini
  - Damir Jamsek
  - et al.
- 2006
- IBM J. Res. Dev
A double precision floating point multiply
- - Robert Montoye
  - Wendy Belluomini
  - et al.
- 2003
- ISSCC 2003
Verification of FM9801: An out-of-order microprocessor model with speculative execution, exceptions, and program-modifying capability
- - Jun Sawada
  - Warren A. Hunt Jr.
- 2002
- Formal Methods in System Design
Derivation of a rotator circuit with homogeneous interconnect
- - H. Peter Hofstee
  - Jun Sawada
- 2001
- Information Processing Letters