Manufacturing Yield Improvement for Advanced CMOS Technology Middle-of-Line Interconnect with Cobalt Metallization : YE: YieldEnhancement/Learning
- Susan Fan
- P. Jamison
- et al.
- 2023
- ASMC 2023
Publications
19 results for Joe Lee
Strategies for aggressive scaling of EUV multi-patterning to sub-20 nm features
- A. Dutta
- Jennifer Church
- et al.
- 2020
- SPIE Advanced Lithography 2020
Technology challenges and enablers to extend Cu metallization to beyond 7 nm node
- Takeshi Nogami
- H. Huang
- et al.
- 2019
- VLSI Technology 2019
Self-aligned blocking integration demonstration for critical sub-30-nm pitch Mx level patterning with EUV self-aligned double patterning
- Angelique Raley
- Joe Lee
- et al.
- 2019
- J. Micro/Nanolithogr. MEMS MOEMS
Process Challenges in Fully Aligned Via Integration for sub 32 nm Pitch BEOL
- Benjamin D. Briggs
- C.B. Pcethala
- et al.
- 2018
- IITC 2018
Self-aligned blocking integration demonstration for critical sub-30nm pitch Mx level patterning with EUV self-aligned double patterning
- Angelique Raley
- Joe Lee
- et al.
- 2018
- SPIE Advanced Lithography 2018
Fully aligned via integration for extendibility of interconnects to beyond the 7 nm node
- Benjamin D. Briggs
- C.B. Peethala
- et al.
- 2017
- IEDM 2017
Comparison of key fine-line BEOL metallization schemes for beyond 7 nm node
- Takeshi Nogami
- X. Zhang
- et al.
- 2017
- VLSI Technology 2017
Reliable airgap BEOL technology in advanced 48 nm pitch copper/ULK interconnects for substantial power and performance benefits
- C. J. Penny
- S. Gates
- et al.
- 2017
- IITC 2017
Single-expose patterning development for EUV lithography
- Anuja De Silva
- Karen Petrillo
- et al.
- 2017
- SPIE Advanced Lithography 2017