A Two-Dimensional Process Model for Chemimechanical Polish Planarization
- J. Warnock
- 2019
- JES
Paper
Publications
131 results for J. Warnock
IBM z14: Enabling physical design in 14-nm technology for high-performance, high-reliability microprocessors
- David Wolpert
- E. Behnen
- et al.
- 2018
- IBM J. Res. Dev
PaperIBM z14 design methodology enhancements in the 14-nm technology node
- Christopher Berry
- J. Warnock
- et al.
- 2018
- IBM J. Res. Dev
ReviewIBM z13 circuit design and methodology
- J. Warnock
- Christopher Berry
- et al.
- 2015
- IBM J. Res. Dev
PaperA case study of electromigration reliability: From design point to system operations
- Baozhen Li
- Paul Muller
- et al.
- 2015
- IRPS 2015
Conference paper4.1 22nm Next-generation IBM System z microprocessor
- J. Warnock
- Brian Curran
- et al.
- 2015
- ISSCC 2015
Conference paperOff-state self-heating, micro-hot-spots, and stress-induced device considerations in scaled technologies
- Siyu Koswatta
- N. Mavilla
- et al.
- 2015
- IEDM 2015
Conference paperIBM POWER8 circuit design and energy optimization
- Victor Zyuban
- Joshua Friedrich
- et al.
- 2015
- IBM J. Res. Dev
PaperThe 12-core POWER8™ processor with 7.6 Tb/s IO bandwidth, integrated voltage regulation, and resonant clocking
- Eric J. Fluhr
- Steve Baumgartner
- et al.
- 2015
- IEEE JSSC
PaperCircuit and physical design of the zenterprise™ ec12 microprocessor chips and multi-chip module
- James Warnock
- Yuen Chan
- et al.
- 2014
- IEEE Journal of Solid-State Circuits
Paper