A low-power mm wave CML prescaler in 65nm SOI CMOS technology
- Daeik D. Kim
- Ongyeun Cho
- et al.
- 2008
- CSICS 2008
Publications
5 results for Daihyun Lim
Decomposition and analysis of process variability using constrained principal component analysis
- Ongyeun Cho
- Daeik D. Kim
- et al.
- 2008
- IEEE Trans Semicond Manuf
A 75GHz PLL front-end integration in 65nm SOI CMOS technology
- Daeik Kim
- Jonghae Kim
- et al.
- 2007
- VLSI Circuits 2007
A GHz-digital clock jitters in time and frequency
- Daeik D. Kim
- Jonghae Kim
- et al.
- 2007
- A-SSCC 2007
A 70GHz manufacturable complementary LC-VCO with 6.14GHz tuning range in 65nm SOI CMOS
- Daeik D. Kim
- Jonghae Kim
- et al.
- 2007
- ISSCC 2007