Bias temperature instability in high-κ/metal gate transistors - Gate stack scaling trends
- Siddarth Krishnan
- Vijay Narayanan
- et al.
- 2012
- IRPS 2012
Conference paper
Publications
169 results for Jim Stathis
Min-log approach to modeling dielectric breakdown data
- Emmanuel Yashchin
- Baozhen Li
- et al.
- 2012
- IRPS 2012
Conference paperDetailed study of fast transient relaxation of Vt instability in HKMG nFETs
- K. Zhao
- James Stathis
- et al.
- 2012
- IRPS 2012
Conference paperFundamental aspects of HfO 2-based high-k metal gate stack reliability and implications on t inv-scaling
- E. Cartier
- Andreas Kerber
- et al.
- 2011
- IEDM 2011
Conference paperA manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications
- S. Krishnan
- U. Kwon
- et al.
- 2011
- IEDM 2011
Conference paperPBTI/NBTI monitoring ring oscillator circuits with on-chip Vt characterization and high frequency AC stress capability
- Jae-Joon Kim
- Rahul M. Rao
- et al.
- 2011
- VLSI Circuits 2011
Conference paperFull metal gate with borderless contact for 14 nm and beyond
- Soon-Cheon Seo
- L.F. Edge
- et al.
- 2011
- VLSI Technology 2011
Conference paperA robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOS
- D.P. Ioannou
- K. Zhao
- et al.
- 2011
- IRPS 2011
Conference paperPBTI under dynamic stress: From a single defect point of view
- K. Zhao
- J.H. Stathis
- et al.
- 2011
- IRPS 2011
Conference paperAnalysis of recoverable and non-recoverable NBTI and PBTI using AC and DC stresses
- Frederic Monsieur
- Eduard Cartier
- et al.
- 2011
- IRPS 2011
Conference paper