Publications

13 results for S. Panda

Controlling line-edge roughness and reactive ion etch lag in sub-150 nm features in borophosphosilicate glass
- - Parijat Bhatnagar
  - Siddhartha Panda
  - et al.
- 2007
- Journal of Applied Physics
Stress proximity technique for performance improvement with dual stress liner at 45nm technology and beyond
- - X. Chen
  - S. Fang
  - et al.
- 2006
- VLSI Technology 2006
Integrated non-SO ₂ underlayer and improved line-edge-roughness dielectric etch process using 193 nm bilayer resist
- - Parijat Bhatnagar
  - Siddhartha Panda
  - et al.
- 2006
- Applied Physics Letters
Systematic characterization of pseudomorphic (110) intrinsic SiGe epitaxial films for hybrid orientation technology with embedded SiGe source/drain
- - Qiqing Ouyang
  - Anita Madan
  - et al.
- 2006
- MRS Spring Meeting 2006
Dual stress liner enhancement in hybrid orientation technology
- - C. Sheraw
  - M. Yang
  - et al.
- 2005
- VLSI Technology 2005
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- - W.-H. Lee
  - A. Waite
  - et al.
- 2005
- IEDM 2005
Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
- - M. Horstmann
  - A. Wei
  - et al.
- 2005
- IEDM 2005
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
- - E. Leobandung
  - H. Nayakama
  - et al.
- 2005
- VLSI Technology 2005
Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates
- - Qiqing Ouyang
  - Min Yang
  - et al.
- 2005
- VLSI Technology 2005
Design of high performance PFETs with strained Si channel and laser anneal
- - Z. Luo
  - Y.F. Chong
  - et al.
- 2005
- IEDM 2005