Publications

10 results for Y.Y. Wang

A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications
- - S. Krishnan
  - U. Kwon
  - et al.
- 2011
- IEDM 2011
On the systematic analysis of ring-delay performance using statistical behavior model
- - Q. Liang
  - B. Greene
  - et al.
- 2009
- ISDRS 2009
SMT and enhanced SPT with Recessed SD to improve CMOS Device Performance
- - S. Fang
  - S.S. Tan
  - et al.
- 2008
- ICSICT 2008
A simple hardware-based statistical model on 65nm SOI CMOS technology
- - Q. Liang
  - J.B. Johnson
  - et al.
- 2007
- ISDRS 2007
Band edge high-K /metal gate n-MOSFETs using ultra thin capping layers
- - V.K. Paruchuri
  - V. Narayanan
  - et al.
- 2007
- VLSI-TSA 2007
Recent advances and current challenges in the search for high mobility band-edge high-k/metal gate stacks
- - V. Narayanan
  - V.K. Paruchuri
  - et al.
- 2007
- Microelectronic Engineering
Dual layer SrTiO₃/HfO₂ gate dielectric for aggressively scaled band-edge nMOS devices
- - C. Choi
  - E. Cartier
  - et al.
- 2007
- Microelectronic Engineering
Recent advances in search for suitable high-k/metal gate solutions to replace SiON/Poly-silicon gate stacks in CMOS devices for 45nm and beyond technologies
- - B.P. Linder
  - V.K. Paruchuri
  - et al.
- 2007
- ECS Meeting 2007
Examination of flatband and threshold voltage tuning of HfO₂/TiN field effect transistors by dielectric cap layers
- - S. Guha
  - V.K. Paruchuri
  - et al.
- 2007
- Applied Physics Letters
Band-edge high-performance high-κ /metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyond
- - V. Narayanan
  - V.K. Paruchuri
  - et al.
- 2006
- VLSI Technology 2006