70 nm damascene-gate MOSFETs with minimal polysilicon gate-depletion
- Hussein I. Hanafi
- Russell Arndt
- et al.
- 2001
- ESSDERC 2001
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27 results for Diane C. Boyd
New polysilicon disposable sidewall process for sub-50 nm CMOS
- K.L. Lee
- D. Boyd
- et al.
- 2001
- ESSDERC 2001
N-channel MOSFETs fabricated on He-implanted and annealed SiGe buffer layers
- P.M. Mooney
- K. Rim
- et al.
- 2005
- Solid-State Electronics
Threshold voltage control in NiSi-Gated MOSFETs through SIIS
- Jakub Kedzierski
- Diane Boyd
- et al.
- 2005
- IEEE Transactions on Electron Devices
Extension and source/drain design for high-performance FinFET devices
- Jakub Kedzierski
- Meikei Ieong
- et al.
- 2003
- IEEE Transactions on Electron Devices
Two gates are better than one
- P. Solomon
- K.W. Guarini
- et al.
- 2003
- IEEE Circuits and Devices Magazine
Triple-self-aligned, planar double-gate MOSFETs: Devices and circuits
- K.W. Guarini
- P. Solomon
- et al.
- 2001
- Technical Digest-International Electron Devices Meeting