Publications

28 results for Michael P. Beakes

A 0.88pJ/bit 112Gb/s PAM4 Transmitter with 1V_ppd Output Swing and 5-Tap Analog FFE in 7nm FinFET CMOS
- - Zeynep Toprak-Deniz
  - Timothy O. Dickson
  - et al.
- 2024
- VLSI Technology and Circuits 2024
A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links
- - Timothy O. Dickson
  - Zeynep Toprak Deniz
  - et al.
- 2023
- IEEE JSSC
An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS
- - A. Serdar Yonar
  - Pier Andrea Francese
  - et al.
- 2022
- VLSI Technology and Circuits 2022
A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links
- - Timothy Dickson
  - Zeynep Deniz
  - et al.
- 2022
- VLSI Technology and Circuits 2022
A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter with Reconfigurable 3-Tap FFE in 14-nm CMOS
- - Zeynep Toprak-Deniz
  - Jonathan E. Proesel
  - et al.
- 2020
- IEEE JSSC
Multi-Wavelength Optical Transceivers Integrated on Node (MOTION)
- - Daniel M. Kuchta
  - Jonathan E. Proesel
  - et al.
- 2019
- OFC 2019
6.6 A 128Gb/s 1.3pJ/b PAM-4 Transmitter with Reconfigurable 3-Tap FFE in 14nm CMOS
- - Zeynep Toprak-Deniz
  - Jonathan E. Proesel
  - et al.
- 2019
- ISSCC 2019
A 1.8 pJ/bit 16 × 16Gb/s source-synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration
- - Timothy O. Dickson
  - Yong Liu
  - et al.
- 2016
- IEEE JSSC
A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI
- - Sergey V. Rylov
  - Troy Beukema
  - et al.
- 2016
- ISSCC 2016
A 25 Gb/s Burst-Mode Receiver for Low Latency Photonic Switch Networks
- - Alexander V. Rylyakov
  - Jonathan E. Proesel
  - et al.
- 2015
- IEEE JSSC