A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFETGain KimMarcel Kosselet al.2020IEEE JSSC
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFETGain KimLukas Kullet al.2019A-SSCC 2019
Non-filamentary non-volatile memory elements as synapses in neuromorphic systemsAlessandro FumarolaYusuf Leblebiciet al.2019NVMTS 2019
Multi-ReRAM synapses for artificial neural network trainingIrem BoybatCecilia Giovinazzoet al.2019ISCAS 2019
30.2 A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFETGain KimLukas Kullet al.2019ISSCC 2019
Impact of conductance drift on multi-PCM synaptic architecturesIrem BoybatS. R. Nandakumaret al.2018NVMTS 2018
Online Feature Learning from a non-i.i.d. Stream in a Neuromorphic System with Synaptic CompetitionStanislaw WozniakAngeliki Pantaziet al.2018IJCNN 2018
Neuromorphic computing with multi-memristive synapsesIrem BoybatManuel Le Galloet al.2018Nature Communications
Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline ReceiverGain KimLukas Kullet al.2018ISCAS 2018
A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver with Low-Latency Digital CDR in 14-nm CMOS FinFETIlter OzkayaAlessandro Cevreroet al.2018IEEE JSSC