Publications

35 results for Alessandro Cevrero

Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver
- - Gain Kim
  - Lukas Kull
  - et al.
- 2018
- ISCAS 2018
A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver with Low-Latency Digital CDR in 14-nm CMOS FinFET
- - Ilter Ozkaya
  - Alessandro Cevrero
  - et al.
- 2018
- IEEE JSSC
A 32 Gb/s, 4.7 pJ/bit Optical Link With-11.7 dBm Sensitivity in 14-nm FinFET CMOS
- - Jonathan E. Proesel
  - Zeynep Toprak-Deniz
  - et al.
- 2018
- IEEE JSSC
A 56Gb/s burst-mode NRZ optical receiver with 6.8ns power-on and CDR-Lock time for adaptive optical links in 14nm FinFET CMOS
- - Ilter Ozkaya
  - Alessandro Cevrero
  - et al.
- 2018
- ISSCC 2018
A 112Gb/S 2.6pJ/b 8-Tap FFE PAM-4 SST TX in 14nm CMOS
- - Christian Menoifi
  - Matthias Braendli
  - et al.
- 2018
- ISSCC 2018
A 24-to-72GS/s 8b time-interleaved SAR ADC with 2.0-to-3.3pJ/conversion and >30dB SNDR at nyquist in 14nm CMOS FinFET
- - Lukas Kull
  - Danny Luu
  - et al.
- 2018
- ISSCC 2018
An Eight-Lane 7-Gb/s/pin Source Synchronous Single-Ended RX with Equalization and Far-End Crosstalk Cancellation for Backplane Channels
- - Cosimo Aprile
  - Alessandro Cevrero
  - et al.
- 2018
- IEEE JSSC
A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET
- - Ilter Ozkaya
  - Alessandro Cevrero
  - et al.
- 2017
- IEEE JSSC
DDR4 transmitter with ac-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS Technology
- - Marcel Kossel
  - Christian Menolfi
  - et al.
- 2017
- ESSCIRC 2017
Background calibration using noisy reference ADC for a 12b 600MS/s 2×TI SAR ADC in 14nm CMOS FinFET
- - Danny Luu
  - Lukas Kull
  - et al.
- 2017
- ESSCIRC 2017