Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Due to the lower dielectric constant than the currently used SiO2 dielectric, several polyimides are being considered for use in multi-layer high density interconnects. However, the mismatch in out-of-plane coefficient of thermal expansion (CTE) between the Cu conductor and most spin-coated polyimides may cause interfacial failures. A scanning probe microscope was used to estimate the out-of-plane CTE for several 1 μm thick, spin-coated polyimides and to observe thermally induced deformation of Cu-polyimide test structures on Si. The change in relative height of arrays of parallel Cu and polyimide lines of various aspect ratios were imaged in air at room temperature and 97°C. Linear elastic, generalized plane strain finite element models for different out-of-plane CTEs were used to estimate the CTE from the profile changes. It was observed that narrow (≤1 μm) polyimide lines are more constrained from expansion than wider lines.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Biancun Xie, Madhavan Swaminathan, et al.
EMC 2011
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
J.C. Marinace
JES