Sangbum Kim, N. Sosa, et al.
IEDM 2013
We demonstrate techniques for measuring thermoelectric voltages and generating on-chip power using a silicon-on-insulator substrate. Our design uses lateral heat conduction in the silicon overlayer to establish temperature gradients, which dramatically reduces microfabrication complexity compared to competing designs based on a free-standing membrane. This letter characterizes the thermoelectric power of a metal-semiconductor structure involving a doped SbTe alloy that is relevant for phase-change memory. The thermoelectric power of the SbTe-TiW thermocouple is 24 μV/K, and the power generation output achieves up to 0.56 μW/cm 2 with a temperature gradient of 18°. © 2011 IEEE.
Sangbum Kim, N. Sosa, et al.
IEDM 2013
S. Burc Eryilmaz, Duygu Kuzum, et al.
IEDM 2013
M. Ito, Masatoshi Ishii, et al.
NANO 2018
Sangbum Kim, Chung H. Lam
VLSI-TSA 2012