Impact of power granularity on chip thermal modeling
Keivan Etessam-Yazdani, Hendrik F. Hamann, et al.
ITherm 2006
Simulation of the temperature field in silicon-on-insulator (SOI) transistors is partially impaired at present by the lack of appropriate models and data for thermal conduction in thin silicon overlayer in SOI substrates. The present work develops simple algebraic expressions to account for the reduction in thermal conductivity due to the phonon-boundary scattering (size effect). The results are compared with the experimental data for pure silicon layers. The modeling focuses on temperature above 300 K and can be used to estimate the temperature field and improve the thermal design of SOI transistors.
Keivan Etessam-Yazdani, Hendrik F. Hamann, et al.
ITherm 2006
Keivan Etessam-Yazdani, Mehdi Asheghi, et al.
Nanoscale and Microscale Thermophysical Engineering
Keivan Etessam-Yazdani, Hendrik F. Hamann, et al.
ASME Electronic and Photonics Packaging Division 2007
Hulling Shang, Marvin H. White, et al.
IEEE International SOI Conference 2002