John DeBrosse, Dietmar Gogl, et al.
IEEE Journal of Solid-State Circuits
Paper
TA-A3 Retention Time Studies in Buried-Channel MOSFET Dynamic-Memory Devices
Abstract
No abstract available.
Related
Conference paper
An 18 ns 56-bit multiply-adder circuit
Robert K. Montoye, P.W. Cook, et al.
ISSCC 1990
Conference paper
Control store implementation of a high performance VLSI CISC
J.H. Chang, H.H. Chao, et al.
MICRO Annual Workshop 1987
F.Warren Shih, H.H. Chao, et al.
IEEE ITC 1985