William Hinsberg, Joy Cheng, et al.
SPIE Advanced Lithography 2010
The influence of the dimensionality on the performance of tunneling field-effect transistors is investigated with simulations. It is shown that in a three-dimensional tunneling FET it is possible to achieve inverse subthreshold slopes smaller than 60 mV/dec. However, there is a trade-off between high on-currents and small values for the subthreshold swing. Using a carbon nanotube tunneling FET as an example it is shown that in contrast to the 3D case, one-dimensional systems offer the possibility to combine a high on-state performance with steep inverse subthreshold slopes. © 2007 Elsevier Ltd. All rights reserved.
William Hinsberg, Joy Cheng, et al.
SPIE Advanced Lithography 2010
B.A. Hutchins, T.N. Rhodin, et al.
Surface Science
T.N. Morgan
Semiconductor Science and Technology
J. Tersoff
Applied Surface Science